#include <stdint.h>
#include "udp_def.h"
#include "udf_cfg.h"
#include "udf_global.h"
#include "udf.h"

#ifdef UDP_SUB_PROJECT
#define UDP_ANA_CRC (0)
#define UDP_DATAPREP_CRC (0)
#define UDP_ALG_CRC (0)
#define UDP_FUNC_CRC (0)
#define UDP_RSV_CRC (0)
#else
#include "udp_def_auto.h"
#endif

#undef BBE_ABUF0_OFFSET
#undef BBE_ABUF1_OFFSET
#undef BBE_ABUF2_OFFSET
	
/*
	UDP 参数定义
*/
#if defined(UDF_SUB_PROJECT)
const UDP_2K_t UDP_2k_Const = {
#elif defined(UDP_SUB_PROJECT) || defined(UDF_PRJ)
const UDP_2K_t UDP_2k_Const __attribute__((section(".ARM.__at_0x0000C000"))) = {
#else 
const UDP_2K_t UDP_2k_Const = { //__attribute__((section(".ARM.__at_0x00005000"))) = {
#endif

	.paraANA.ana1.ana_cfg0   = UDPCFG_ANA1_CFG0,
	.paraANA.ana1.ana_cfg1   = UDPCFG_ANA1_CFG1,
	.paraANA.ana1.ana_cfg2   = UDPCFG_ANA1_CFG2,
  
	.paraANA.ana2.ana_cfg0   = UDPCFG_ANA2_CFG0,
	.paraANA.ana2.ana_cfg1   = UDPCFG_ANA2_CFG1,
	.paraANA.ana2.ana_cfg2   = UDPCFG_ANA2_CFG2,
  
	.paraANA.ana3.ana_cfg0   = UDPCFG_ANA3_CFG0,
	.paraANA.ana3.ana_cfg1   = UDPCFG_ANA3_CFG1,
	.paraANA.ana3.ana_cfg2   = UDPCFG_ANA3_CFG2,
  
	.paraANA.ana4.ana_cfg0   = UDPCFG_ANA4_CFG0,
	.paraANA.ana4.ana_cfg1   = UDPCFG_ANA4_CFG1,
	.paraANA.ana4.ana_cfg2   = UDPCFG_ANA4_CFG2,

	.paraANA.ramp_pll_cfg    = UDPCFG_RAMP_PLL,    //freq start  24.01G
	.paraANA.ramp_syncw_cfg  = UDPCFG_SYNCW,       //sync  3210
	.paraANA.ramp_chirpw_cfg = UDPCFG_CHIRPW,      //acc   210
	.paraANA.ramp_wm_cfg0    = UDPCFG_RAMP_WM,     //circle mode
														 
	.paraANA.ramp_mem03      = UDPCFG_RAMP_WAVE0_A,   //A: 10us     0G  
	.paraANA.ramp_mem02      = UDPCFG_RAMP_WAVE0_B,   //B: 30us  0.22G
	.paraANA.ramp_mem01      = UDPCFG_RAMP_WAVE0_C,   //c: 30us -0.22G
	.paraANA.ramp_mem00      = UDFDEF_RAMP_WAVE0_R,
	
	.paraANA.ramp_mem13      = UDPCFG_RAMP_WAVE1_A,   //A:  10us     0G
	.paraANA.ramp_mem12      = UDPCFG_RAMP_WAVE1_B,   //B: 110us  0.22G
	.paraANA.ramp_mem11      = UDPCFG_RAMP_WAVE1_C,   //c:  30us -0.22G
	.paraANA.ramp_mem10      = UDFDEF_RAMP_WAVE1_R,  // covered by udf03
	
	.paraANA.crcLen = 96, // 96
	.paraANA.crcVal = UDP_ANA_CRC,
	/************************************paramDataPrep***************************************/

	.paraDataPrep.calibAnt2_r = UDFDEF_ANT2_CALIB_R,					
	.paraDataPrep.calibAnt2_i = UDFDEF_ANT2_CALIB_I,
	
	.paraDataPrep.angleDstAddr = GET_OFFSET(UDFDEF_ADDR_ARRAY_CALIB),				
	.paraDataPrep.angleFlashLen = NUM_ANGLE * UDFDEF_ANT_NUM * NUM_BYTE32, 
	
	// winRange
	.paraDataPrep.winRange.len    = UDFDEF_ADCSAMP_NUM,
	.paraDataPrep.winRange.srcInc = 2 * 256 / UDFDEF_ADCSAMP_NUM,
	.paraDataPrep.winRange.dstOffsetAddr = GET_OFFSET(UDFDEF_ADDR_WIN_RANGE), 
	.paraDataPrep.winRange.dstInc = 2,
	
	// winVel
	.paraDataPrep.winVel.len = UDFDEF_CHIRP_NUM,
	.paraDataPrep.winVel.dstOffsetAddr = GET_OFFSET(UDFDEF_ADDR_WIN_VEL), 
	.paraDataPrep.winVel.srcInc = 2 * 256 / UDFDEF_CHIRP_NUM,
	.paraDataPrep.winVel.dstInc = 2,
	
	.paraDataPrep.constFlashEn = 0, // 不再支持自定义窗
	#if defined(FLASH_WINRANGE) && defined(FLASH_WINVEL)
	.paraDataPrep.constEn = CONST_ANGLE_EN,
	#elif defined(FLASH_WINRANGE)
	.paraDataPrep.constEn =  CONST_WINVEL_EN |CONST_ANGLE_EN,
	#elif defined(FLASH_WINVEL)
	.paraDataPrep.constEn = CONST_WINRANGE_EN |CONST_ANGLE_EN,
	#else
	.paraDataPrep.constEn = CONST_WINRANGE_EN | CONST_WINVEL_EN |CONST_ANGLE_EN,
	#endif
	
	.paraDataPrep.prepCfg0 = UDPCFG_DP_CFG0,
	.paraDataPrep.prepCfg1 = UDPCFG_DP_CFG1,
	.paraDataPrep.prepCfg2 = UDPCFG_DP_CFG2,
		
	.paraDataPrep.cycleNum=UDFDEF_CYCLE_NUM,

	.paraDataPrep.sweepMode = SWEEP_MODE_CHIRP_SUM, // 1:continue  2:interval 3:chirp-sum
	.paraDataPrep.lowPower = LOWPOWER_DIS,

	.paraDataPrep.crcLen = 75, //
	.paraDataPrep.crcVal = UDP_DATAPREP_CRC,
	
	/**********************************************************************************/

	/*************************************************paramALG***********************************/
	.paraALG.algEn = ALG0_EN|ALG25_EN|ALG1_EN|ALG6_EN|ALG10_EN|ALG11_EN,
	// ALG1_EN | ALG2_EN | ALG6_EN | ALG10_EN | ALG12_EN | ALG14_EN | ALG16_EN | ALG19_EN | ALG20_EN | ALG22_EN | ALG23_EN,

#if( TEST_MODE == 4)
	/*alg0*/ // copy singlechirp@abuf2 -> abuf0
	// intraCnt,fix2pfLsfB,max_clr,p2_fft_mode,dma_dsize,rsfBit,sub_mode,mode
    .paraALG.alg0.p2Cfg0 = (UDFDEF_ADCSAMP_NUM/4-1)<< 20|
                            P2_FIX2PF_LSFB_0BIT<<17|
                            P2_MAX_CLR_EN<<16 |
                            P2_FFT_MODE_DIS<<14|
                            P2_DMA_DSIZE_32BIT<<12|
                            P2_RSF_DIV1<<8|
                            P2_SUBMODE_0<<4|
                            P2_MODE_DMA,
    //jumpCnt,interCnt
    .paraALG.alg0.p2Cfg1 = (UDFDEF_CHIRP_SUM_NUM-1)<< 12 |(UDFDEF_ANT_NUM-1)<< 0,
    //ncoMode,nco_fcw
    .paraALG.alg0.p2Cfg2 = (0)<< 24 |(0)<< 0,
    //src0JumpInc,src0InterInc
    .paraALG.alg0.p2Cfg3 = (UDFDEF_ADCSAMP_NUM*UDFDEF_ANT_NUM)<<16 |(UDFDEF_ADCSAMP_NUM)<< 0,	
    //src0IntraInc,src0BaseAddr		          
    .paraALG.alg0.p2Cfg4 = (NUM_BYTE32)<<16 |(GET_OFFSET(UDFDEF_ADDR_ADCSAMP))<< 0,
    //src1JumpInc,src1InterInc		           
    .paraALG.alg0.p2Cfg5 = (0)<<16 |(0)<< 0,	
    //src1IntraInc,src1BaseAddr            
    .paraALG.alg0.p2Cfg6 = (0)<<16 |(0)<< 0,		
    //dstJumpInc,dstInterInc                
    .paraALG.alg0.p2Cfg7 = (UDFDEF_ADCSAMP_NUM*UDFDEF_ANT_NUM)<<16 |(UDFDEF_ADCSAMP_NUM)<< 0,		
    //dstIntraInc,dstBaseAddr               
    .paraALG.alg0.p2Cfg8 = (NUM_BYTE32)<<16 |GET_OFFSET(UDFDEF_ADDR_ADCSAMP_TEST)<< 0,	
	.paraALG.alg0_dstInc = UDFDEF_ADCSAMP_NUM*UDFDEF_CHIRP_SUM_NUM*UDFDEF_ANT_NUM,
#else
	/*alg0*/ // chirpsum ant1->abuf0+15K  ant2->abuf1+15K
	// intraCnt,fix2pfLsfB,max_clr,p2_fft_mode,dma_dsize,rsfBit,sub_mode,mode
	.paraALG.alg0.p2Cfg0 = (UDFDEF_CHIRP_SUM_NUM - 1) << 20 |
							P2_FIX2PF_LSFB_0BIT << 17 |
							P2_MAX_CLR_EN << 16 |
							P2_FFT_MODE_DIS << 14 |
							P2_DMA_DSIZE_8BIT << 12 |
							P2_RSF_DIV1 << 8 |
							P2_SUBMODE_0 << 4 |
							P2_MODE_ACC,
	// jumpCnt,interCnt
	.paraALG.alg0.p2Cfg1 = (UDFDEF_ANT_NUM - 1) << 12 | (UDFDEF_ADCSAMP_NUM - 1) << 0,
	// ncoMode,nco_fcw
	.paraALG.alg0.p2Cfg2 = (0) << 24 | (0) << 0,
	// src0JumpInc,src0InterInc
	.paraALG.alg0.p2Cfg3 = (NUM_BYTE8*UDFDEF_ADCSAMP_NUM) << 16 | (NUM_BYTE8) << 0,
	// src0IntraInc,src0BaseAddr
	.paraALG.alg0.p2Cfg4 = (NUM_BYTE8*UDFDEF_ADCSAMP_NUM*UDFDEF_ANT_NUM) << 16 | (GET_OFFSET(UDFDEF_ADDR_ADCSAMP)) << 0,
	// src1JumpInc,src1InterInc
	.paraALG.alg0.p2Cfg5 = (0) << 16 | (0) << 0,
	// src1IntraInc,src1BaseAddr
	.paraALG.alg0.p2Cfg6 = (0) << 16 | (0) << 0,
	// dstJumpInc,dstInterInc
	.paraALG.alg0.p2Cfg7 = (GET_OFFSET(UDFDEF_ADDR_FFT1D_ANT2)-GET_OFFSET(UDFDEF_ADDR_FFT1D_ANT1)) << 16 | (UDFDEF_CHIRP_NUM*NUM_BYTE32) << 0,
	// dstIntraInc,dstBaseAddr
	.paraALG.alg0.p2Cfg8 = (0) << 16 | (GET_OFFSET(UDFDEF_ADDR_FFT1D_ANT1)) << 0,
	.paraALG.alg0_dstInc = NUM_BYTE32,
	// UDFDEF_ADCSAMP_NUM
	// 时域求和->ANT0-ABUF0、ANT1-ABUF1
	#endif
	
	#if 1 /*alg1*/
	//intraCnt,fix2pfLsfB,max_clr,p2_fft_mode,dma_dsize,rsfBit,sub_mode,mode		
	.paraALG.alg1.p2Cfg0 = (UDFDEF_CHIRP_NUM-1)<< 20|
													P2_FIX2PF_LSFB_0BIT<<17|
													P2_MAX_CLR_EN<<16 |
													P2_FFT_MODE_DIS<<14|
													P2_DMA_DSIZE_32BIT<<12|
													#if (UDFDEF_CHIRP_NUM == 64)
													P2_RSF_DIV64<<8|
													#elif (UDFDEF_CHIRP_NUM == 32 )
													P2_RSF_DIV32<<8|
													#elif (UDFDEF_CHIRP_NUM == 16 )
													P2_RSF_DIV16<<8|
													#elif (UDFDEF_CHIRP_NUM == 8 )
													P2_RSF_DIV8<<8|
													#else
													#error unxxx
													#endif
													P2_SUBMODE_0<<4|
													P2_MODE_ACC,
	//jumpCnt,interCnt
	.paraALG.alg1.p2Cfg1 = (0)<< 12 |(UDFDEF_RANGE_USE-1)<< 0,
	//ncoMode,nco_fcw
	.paraALG.alg1.p2Cfg2 = (0)<< 24 |(0)<< 0,
	//src0JumpInc,src0InterInc
	.paraALG.alg1.p2Cfg3 = (0)<<16 |(UDFDEF_CHIRP_NUM*NUM_BYTE32)<< 0,	
	//src0IntraInc,src0BaseAddr		          
	.paraALG.alg1.p2Cfg4 = (NUM_BYTE32)<<16 |(GET_OFFSET(UDFDEF_ADDR_FFT1D_ANT1))<< 0,
	//src1JumpInc,src1InterInc		           
	.paraALG.alg1.p2Cfg5 = (0)<<16 |(0)<< 0,
	//src1IntraInc,src1BaseAddr            
	.paraALG.alg1.p2Cfg6 = (0)<<16 |(0)<< 0,		
	//dstJumpInc,dstInterInc                
	.paraALG.alg1.p2Cfg7 = (0)<<16 |(NUM_BYTE32)<< 0,
	//dstIntraInc,dstBaseAddr               
	.paraALG.alg1.p2Cfg8 = (0)<<16 |(GET_OFFSET(UDFDEF_ADDR_FFT1D_MEAN))<< 0,
	#endif
	
	#if 0 /*alg2*/
	// intraCnt,fix2pfLsfB,max_clr,p2_fft_mode,dma_dsize,rsfBit,sub_mode,mode
    .paraALG.alg2.p2Cfg0 = (UDFDEF_RANGE_USE-1)<< 20|
                            P2_FIX2PF_LSFB_0BIT<<17|
                            P2_MAX_CLR_EN<<16 |
                            P2_FFT_MODE_DIS<<14|
                            P2_DMA_DSIZE_32BIT<<12|
                            P2_RSF_DIV1<<8|
                            P2_SUBMODE_0<<4|
                            P2_MODE_MUL,
    //jumpCnt,interCnt
    .paraALG.alg2.p2Cfg1 = (0)<< 12 |(0)<< 0,
    //ncoMode,nco_fcw
    .paraALG.alg2.p2Cfg2 = (0)<< 24 |(0)<< 0,
    //src0JumpInc,src0InterInc
    .paraALG.alg2.p2Cfg3 = (0)<<16 |(0)<< 0,	
    //src0IntraInc,src0BaseAddr		          
    .paraALG.alg2.p2Cfg4 = (NUM_BYTE32)<<16 |(BBE_ABUF1_OFFSET+15*1024+512)<< 0,	// test BBE_ABUF1_OFFSET+15*1024+512
    //src1JumpInc,src1InterInc		           
    .paraALG.alg2.p2Cfg5 = (0)<<16 |(0)<< 0,	
    //src1IntraInc,src1BaseAddr            
    .paraALG.alg2.p2Cfg6 = (0)<<16 |(GET_OFFSET(UDFDEF_ADDR_MEAN_FAC))<< 0,		
    //dstJumpInc,dstInterInc                
    .paraALG.alg2.p2Cfg7 = (0)<<16 |(0)<< 0,		
    //dstIntraInc,dstBaseAddr               
    .paraALG.alg2.p2Cfg8 = (NUM_BYTE32)<<16 |(BBE_ABUF0_OFFSET+15*1024+512)<< 0,	
	#endif
	
	#if 0 /*alg3*/
	// intraCnt,fix2pfLsfB,max_clr,p2_fft_mode,dma_dsize,rsfBit,sub_mode,mode
    .paraALG.alg3.p2Cfg0 = (UDFDEF_RANGE_USE-1)<< 20|
                            P2_FIX2PF_LSFB_0BIT<<17|
                            P2_MAX_CLR_EN<<16 |
                            P2_FFT_MODE_DIS<<14|
                            P2_DMA_DSIZE_32BIT<<12|
                            P2_RSF_DIV1<<8|
                            P2_SUBMODE_0<<4|
                            P2_MODE_DMA,
    //jumpCnt,interCnt
    .paraALG.alg3.p2Cfg1 = (0)<< 12 |(0)<< 0,
    //ncoMode,nco_fcw
    .paraALG.alg3.p2Cfg2 = (0)<< 24 |(0)<< 0,
    //src0JumpInc,src0InterInc
    .paraALG.alg3.p2Cfg3 = (0)<<16 |(0)<< 0,	
    //src0IntraInc,src0BaseAddr		          
    .paraALG.alg3.p2Cfg4 = (NUM_BYTE32)<<16 |(BBE_ABUF0_OFFSET+15*1024+512)<< 0,
    //src1JumpInc,src1InterInc		           
    .paraALG.alg3.p2Cfg5 = (0)<<16 |(0)<< 0,	
    //src1IntraInc,src1BaseAddr            
    .paraALG.alg3.p2Cfg6 = (0)<<16 |(0)<< 0,		
    //dstJumpInc,dstInterInc                
    .paraALG.alg3.p2Cfg7 = (0)<<16 |(0)<< 0,		
    //dstIntraInc,dstBaseAddr               
    .paraALG.alg3.p2Cfg8 = (NUM_BYTE32)<<16 |(BBE_ABUF1_OFFSET+15*1024+512)<< 0,	
	#endif
	
	#if 1
	    .paraALG.alg5.p2Cfg0 = (UDFDEF_CHIRP_NUM-1)<< 20|
                            P2_FIX2PF_LSFB_0BIT<<17|
                            P2_MAX_CLR_EN<<16 |
                            P2_FFT_MODE_EN<<14| 
                            P2_DMA_DSIZE_32BIT<<12|
                            P2_RSF_DIV1<<8|
                            P2_SUBMODE_2<<4|
                            P2_MODE_ADD,
    //jumpCnt,interCnt
    .paraALG.alg5.p2Cfg1 = (0)<< 12 |(UDFDEF_RANGE_USE-1)<< 0,
    //ncoMode,nco_fcw
    .paraALG.alg5.p2Cfg2 = (0)<< 24 |(0)<< 0,
    //src0JumpInc,src0InterInc
    .paraALG.alg5.p2Cfg3 = (0  )<<16 |(UDFDEF_CHIRP_NUM*NUM_BYTE32)<< 0,
    //src0IntraInc,src0BaseAddr		          
    .paraALG.alg5.p2Cfg4 = (NUM_BYTE32)<<16 |(GET_OFFSET(UDFDEF_ADDR_FFT1D_ANT1))<< 0,
    //src1JumpInc,src1InterInc		           
    .paraALG.alg5.p2Cfg5 = (0  )<<16 |(NUM_BYTE32)<< 0,
    //src1IntraInc,src1BaseAddr            
    .paraALG.alg5.p2Cfg6 = (0 )<<16 |(GET_OFFSET(UDFDEF_ADDR_FFT1D_MEAN))<< 0,
    //dstJumpInc,dstInterInc                
    .paraALG.alg5.p2Cfg7 = (0 )<<16 |(UDFDEF_CHIRP_NUM*NUM_BYTE32)<< 0,
    //dstIntraInc,dstBaseAddr               
    .paraALG.alg5.p2Cfg8 = (NUM_BYTE32  )<<16 |(GET_OFFSET(UDFDEF_ADDR_FFT2D_ANT1))<< 0,
    //inPt,fftPt,mode
		#if (UDFDEF_VEL_NUM == 64)
    .paraALG.alg5.fftCfg0 = (UDFDEF_CHIRP_NUM-1)<< 8 |(FFT_PT64)<< 4|(FFT_MODE_FORWARD)<<0,
		#elif (UDFDEF_VEL_NUM == 32)
		.paraALG.alg5.fftCfg0 = (UDFDEF_CHIRP_NUM-1)<< 8 |(FFT_PT32)<< 4|(FFT_MODE_FORWARD)<<0,
		#elif (UDFDEF_VEL_NUM == 16)
		.paraALG.alg5.fftCfg0 = (UDFDEF_CHIRP_NUM-1)<< 8 |(FFT_PT16)<< 4|(FFT_MODE_FORWARD)<<0,
		#elif (UDFDEF_VEL_NUM == 8)
		.paraALG.alg5.fftCfg0 = (UDFDEF_CHIRP_NUM-1)<< 8 |(FFT_PT16)<< 4|(FFT_MODE_FORWARD)<<0,
		#else
		#error unxxx
		#endif
    //useA,useB 
    .paraALG.alg5.fftCfg1 = (0)<< 8 |(UDFDEF_VEL_NUM-1)<< 0,
    //winBaseAddr,winSize,winEn
		#ifdef VEL_WIN_ENABLE
    .paraALG.alg5.fftCfg2 = (uint32_t)(GET_OFFSET(UDFDEF_ADDR_WIN_VEL_TEMP_ANT1))<<16|(FFT_WIN_SIZE_14BIT)<< 1 |(FFT_WIN_EN)<< 0,
		#else
		.paraALG.alg5.fftCfg2 = (uint32_t)(GET_OFFSET(UDFDEF_ADDR_WIN_VEL_TEMP_ANT1))<<16|(FFT_WIN_SIZE_14BIT)<< 1 |(FFT_WIN_DIS)<< 0,
		#endif
	#endif
	
	#if 1  /*alg6*/
    .paraALG.alg6.p2Cfg0 = (UDFDEF_CHIRP_NUM-1)<< 20|
                            P2_FIX2PF_LSFB_0BIT<<17|
                            P2_MAX_CLR_EN<<16 |
                            P2_FFT_MODE_EN<<14| 
                            P2_DMA_DSIZE_32BIT<<12|
                            P2_RSF_DIV1<<8|
                            P2_SUBMODE_2<<4|
                            P2_MODE_ADD,
    //jumpCnt,interCnt
    .paraALG.alg6.p2Cfg1 = (0)<< 12 |(UDFDEF_RANGE_USE-1)<< 0,
    //ncoMode,nco_fcw
    .paraALG.alg6.p2Cfg2 = (0)<< 24 |(0)<< 0,
    //src0JumpInc,src0InterInc
    .paraALG.alg6.p2Cfg3 = (0  )<<16 |(UDFDEF_CHIRP_NUM*NUM_BYTE32)<< 0,
    //src0IntraInc,src0BaseAddr		          
    .paraALG.alg6.p2Cfg4 = (NUM_BYTE32)<<16 |(GET_OFFSET(UDFDEF_ADDR_FFT1D_ANT2))<< 0,
    //src1JumpInc,src1InterInc		           
    .paraALG.alg6.p2Cfg5 = (0  )<<16 |(NUM_BYTE32)<< 0,
    //src1IntraInc,src1BaseAddr            
    .paraALG.alg6.p2Cfg6 = (0 )<<16 |(GET_OFFSET(UDFDEF_ADDR_FFT1D_MEAN))<< 0,
    //dstJumpInc,dstInterInc                
    .paraALG.alg6.p2Cfg7 = (0 )<<16 |(UDFDEF_CHIRP_NUM*NUM_BYTE32)<< 0,
    //dstIntraInc,dstBaseAddr               
    .paraALG.alg6.p2Cfg8 = (NUM_BYTE32  )<<16 |(GET_OFFSET(UDFDEF_ADDR_FFT2D_ANT2))<< 0,
    //inPt,fftPt,mode
		#if (UDFDEF_VEL_NUM == 64)
    .paraALG.alg6.fftCfg0 = (UDFDEF_CHIRP_NUM-1)<< 8 |(FFT_PT64)<< 4|(FFT_MODE_FORWARD)<<0,
		#elif (UDFDEF_VEL_NUM == 32)
		.paraALG.alg6.fftCfg0 = (UDFDEF_CHIRP_NUM-1)<< 8 |(FFT_PT32)<< 4|(FFT_MODE_FORWARD)<<0,
		#elif (UDFDEF_VEL_NUM == 16)
		.paraALG.alg6.fftCfg0 = (UDFDEF_CHIRP_NUM-1)<< 8 |(FFT_PT16)<< 4|(FFT_MODE_FORWARD)<<0,
		#elif (UDFDEF_VEL_NUM == 8)
		.paraALG.alg6.fftCfg0 = (UDFDEF_CHIRP_NUM-1)<< 8 |(FFT_PT16)<< 4|(FFT_MODE_FORWARD)<<0,
		#else
		#error unxxx
		#endif
		
    //useA,useB 
    .paraALG.alg6.fftCfg1 = (0)<< 8 |(UDFDEF_VEL_NUM-1)<< 0,
    //winBaseAddr,winSize,winEn
		#ifdef VEL_WIN_ENABLE
    .paraALG.alg6.fftCfg2 = (uint32_t)(GET_OFFSET(UDFDEF_ADDR_WIN_VEL_TEMP_ANT2))<<16|(FFT_WIN_SIZE_14BIT)<< 1 |(FFT_WIN_EN)<< 0,
		#else
		.paraALG.alg6.fftCfg2 = (uint32_t)(GET_OFFSET(UDFDEF_ADDR_WIN_VEL_TEMP_ANT2))<<16|(FFT_WIN_SIZE_14BIT)<< 1 |(FFT_WIN_DIS)<< 0,
		#endif
	#endif
	
		#if 1 /*alg7*/
    .paraALG.alg7.p2Cfg0 = (UDFDEF_RANGE_USE -1)<< 20|
                            P2_FIX2PF_LSFB_0BIT<<17|
                            P2_MAX_CLR_EN<<16 |
                            P2_FFT_MODE_DIS<<14| 
                            P2_DMA_DSIZE_32BIT<<12|
                            P2_RSF_DIV1<<8|
                            P2_SUBMODE_0<<4|
                            P2_MODE_MUL,
    //jumpCnt,interCnt
    .paraALG.alg7.p2Cfg1 = (0)<< 12 |(0)<< 0,
    //ncoMode,nco_fcw
    .paraALG.alg7.p2Cfg2 = (0)<< 24 |(0)<< 0,
    //src0JumpInc,src0InterInc
    .paraALG.alg7.p2Cfg3 = (0)<<16 |(0)<< 0,
    //src0IntraInc,src0BaseAddr		          
    .paraALG.alg7.p2Cfg4 = (NUM_BYTE32)<<16 |(GET_OFFSET(UDFDEF_ADDR_ABUF_MEAN0))<< 0,
    //src1JumpInc,src1InterInc		           
    .paraALG.alg7.p2Cfg5 = (0)<<16 |(0)<< 0,
    //src1IntraInc,src1BaseAddr            
    .paraALG.alg7.p2Cfg6 = (0)<<16 |(GET_OFFSET(UDFDEF_ADDR_MEAN0_COEF))<< 0,
    //dstJumpInc,dstInterInc                
    .paraALG.alg7.p2Cfg7 = (0)<<16 |(0)<< 0,
    //dstIntraInc,dstBaseAddr               
    .paraALG.alg7.p2Cfg8 = (NUM_BYTE32  )<<16 |(GET_OFFSET(UDFDEF_ADDR_MEAN0_COEFF_RST))<< 0,
	#endif
	
		#if 1 /*alg8*/
    .paraALG.alg8.p2Cfg0 = (UDFDEF_RANGE_USE -1)<< 20|
                            P2_FIX2PF_LSFB_0BIT<<17|
                            P2_MAX_CLR_EN<<16 |
                            P2_FFT_MODE_DIS<<14| 
                            P2_DMA_DSIZE_32BIT<<12|
                            P2_RSF_DIV1<<8|
                            P2_SUBMODE_0<<4|
                            P2_MODE_MUL,
    //jumpCnt,interCnt
    .paraALG.alg8.p2Cfg1 = (0)<< 12 |(0)<< 0,
    //ncoMode,nco_fcw
    .paraALG.alg8.p2Cfg2 = (0)<< 24 |(0)<< 0,
    //src0JumpInc,src0InterInc
    .paraALG.alg8.p2Cfg3 = (0  )<<16 |(0)<< 0,
    //src0IntraInc,src0BaseAddr		          
    .paraALG.alg8.p2Cfg4 = (NUM_BYTE32)<<16 |(GET_OFFSET(UDFDEF_ADDR_ABUF_MEAN1))<< 0,
    //src1JumpInc,src1InterInc		           
    .paraALG.alg8.p2Cfg5 = (0  )<<16 |(0)<< 0,
    //src1IntraInc,src1BaseAddr            
    .paraALG.alg8.p2Cfg6 = (0 )<<16 |(GET_OFFSET(UDFDEF_ADDR_MEAN1_COEF))<< 0,
    //dstJumpInc,dstInterInc                
    .paraALG.alg8.p2Cfg7 = (0 )<<16 |(0)<< 0,
    //dstIntraInc,dstBaseAddr               
    .paraALG.alg8.p2Cfg8 = (NUM_BYTE32  )<<16 |(GET_OFFSET(UDFDEF_ADDR_MEAN1_COEFF_RST))<< 0,
	#endif
	
		#if 1 /*alg9*/
    .paraALG.alg9.p2Cfg0 = (2-1)<< 20|
                            P2_FIX2PF_LSFB_0BIT<<17|
                            P2_MAX_CLR_EN<<16 |
                            P2_FFT_MODE_DIS<<14| 
                            P2_DMA_DSIZE_32BIT<<12|
                            P2_RSF_DIV1<<8|
                            P2_SUBMODE_0<<4|
                            P2_MODE_ACC,
    //jumpCnt,interCnt
    .paraALG.alg9.p2Cfg1 = (0)<< 12 |(UDFDEF_RANGE_USE -1)<< 0,
    //ncoMode,nco_fcw
    .paraALG.alg9.p2Cfg2 = (0)<< 24 |(0)<< 0,
    //src0JumpInc,src0InterInc
    .paraALG.alg9.p2Cfg3 = (0 )<<16 |(NUM_BYTE32)<< 0,
    //src0IntraInc,src0BaseAddr		          
    .paraALG.alg9.p2Cfg4 = (GET_OFFSET(UDFDEF_ADDR_MEAN1_COEFF_RST) - GET_OFFSET(UDFDEF_ADDR_MEAN0_COEFF_RST))<<16 |(GET_OFFSET(UDFDEF_ADDR_MEAN0_COEFF_RST))<< 0,
    //src1JumpInc,src1InterInc		           
    .paraALG.alg9.p2Cfg5 = (0 )<<16 |(0)<< 0,
    //src1IntraInc,src1BaseAddr            
    .paraALG.alg9.p2Cfg6 = (0 )<<16 | (0)<< 0,
    //dstJumpInc,dstInterInc                
    .paraALG.alg9.p2Cfg7 = (0 )<<16 |(NUM_BYTE32)<< 0,
    //dstIntraInc,dstBaseAddr               
    .paraALG.alg9.p2Cfg8 = (0 )<<16 |(GET_OFFSET(UDFDEF_ADDR_FFT1D_MEAN))<< 0,
	#endif
	
	#if 1 /*alg10*/
	// pdEn,cfarMode,wkMode
	.paraALG.alg10_cfar1.cfarCfg0 = (CFAR_PEAKDET_DIS) << 8 | (CFAR_CFARMODE_SO) << 4 | (CFAR_WKMODE_CFAR) << 0,
	// interCnt,intraCnt
	.paraALG.alg10_cfar1.cfarCfg1 = (UDFDEF_RANGE_USE) << 12 | (UDFDEF_VEL_NUM) << 0,
	// wrapDirA,wrapDirB,thresDiv,divFac,mulFac,searchSize,guardSize
	.paraALG.alg10_cfar1.cfarCfg2 = (0) << 25 | (0) << 24 | (CFAR_THRESDIV4) << 20 | (CFAR_DIVFAC1) << 16 | (UDFDEF_CFAR_VTH) << 8 | (UDFDEF_CFAR_VS) << 4 | (UDFDEF_CFAR_VG) << 0,
	// cutThres
	.paraALG.alg10_cfar1.cfarCfg3 = (0) << 0,
	// targetLim
	.paraALG.alg10_cfar1.cfarCfg4 = (CFAR_MAX_NUM - 1) << 0,
	// srcInterInc
	.paraALG.alg10_cfar1.cfarCfg5 = (UDFDEF_CHIRP_NUM*NUM_BYTE32) << 0,
	// srcIntraInc,srcBaseAddr
	.paraALG.alg10_cfar1.cfarCfg6 = (NUM_BYTE32) << 16 | (GET_OFFSET(UDFDEF_ADDR_FFT2D_ANT1)) << 0, // ant1
	// wrapAddrA,wrapAddrB
	.paraALG.alg10_cfar1.cfarCfg7 = (uint32_t)(GET_OFFSET(UDFDEF_ADDR_FFT2D_ANT1) + (UDFDEF_VEL_NUM - UDFDEF_CFAR_VS - UDFDEF_CFAR_VG)*NUM_BYTE32) << 16 | (GET_OFFSET(UDFDEF_ADDR_FFT2D_ANT1)) << 0,
					
	// dstBaseAddr
	.paraALG.alg10_cfar1.cfarCfg8 = (GET_OFFSET(UDFDEF_ADDR_CFAR1_CACHE)) << 0,
	#endif

	.paraALG.cfarAbsAddr = UDFDEF_ADDR_FFT2D_ANT1+BBE_ABS_OFFSET,
	.paraALG.cfarUseRange = UDFDEF_RANGE_USE,
	.paraALG.framePackAddr = UDFDEF_ADDR_POINT_RST,
	
	#if 1 /*alg11*/
	//pdEn,cfarMode,wkMode	
	.paraALG.alg11_cfar2.cfarCfg0= (CFAR_PEAKDET_EN)<< 8 |(CFAR_CFARMODE_SO  )<< 4|(CFAR_WKMODE_CFAR)<< 0,
	//interCnt,intraCnt	
	.paraALG.alg11_cfar2.cfarCfg1= (UDFDEF_VEL_NUM)<< 12 |(UDFDEF_RANGE_USE)<< 0,
	//wrapDirA,wrapDirB,thresDiv,divFac,mulFac,searchSize,guardSize
	//.paraALG.alg11_cfar2.cfarCfg2= (1)  << 25|(1)  << 24|(CFAR_THRESDIV4)  << 20|(CFAR_DIVFAC1) << 16|(UDFDEF_CFAR_RTH) << 8| (UDFDEF_CFAR_RS)<< 4|(UDFDEF_CFAR_RG) << 0,//default:2
	
	.paraALG.alg11_cfar2.cfarCfg2= (0)  << 25|(0)  << 24|(UDFDEF_CFAR_R_THRESDIV)  << 20|(CFAR_DIVFAC1) << 16|(UDFDEF_CFAR_RTH) << 8| (UDFDEF_CFAR_RS)<< 4|(UDFDEF_CFAR_RG) << 0,//default:2
	//cutThres	
	.paraALG.alg11_cfar2.cfarCfg3= (0) << 0,
	//targetLim
	.paraALG.alg11_cfar2.cfarCfg4= (CFAR_MAX_NUM-1)<< 0,
	 //srcInterInc  
	.paraALG.alg11_cfar2.cfarCfg5= (NUM_BYTE32)<< 0,
	 //srcIntraInc,srcBaseAddr 
	.paraALG.alg11_cfar2.cfarCfg6= (NUM_BYTE32*UDFDEF_CHIRP_NUM)<< 16 |(GET_OFFSET(UDFDEF_ADDR_FFT2D_ANT1))<< 0,
	//wrapAddrA,wrapAddrB	
//	.paraALG.alg11_cfar2.cfarCfg7= (uint32_t )(GET_OFFSET(UDFDEF_ADDR_FFT2D_ANT1)+(UDFDEF_CFAR_RS+UDFDEF_CFAR_RG)*NUM_BYTE32*UDFDEF_CHIRP_NUM)<< 16|
//	 (GET_OFFSET(UDFDEF_ADDR_FFT2D_ANT1)+(UDFDEF_RANGE_USE-2)*UDFDEF_CHIRP_NUM*NUM_BYTE32)<< 0,
	//dstBaseAddr	
//	.paraALG.alg11_cfar2.cfarCfg8= (GET_OFFSET(UDFDEF_ADDR_CFAR2_CACHE)) << 0,		
	
	.paraALG.alg11_cfar2.cfarCfg7= (uint32_t )(GET_OFFSET(UDFDEF_ADDR_FFT2D_ANT1)+(UDFDEF_RANGE_USE - UDFDEF_CFAR_RS - UDFDEF_CFAR_RG)*NUM_BYTE32)<< 16|
	 (GET_OFFSET(UDFDEF_ADDR_FFT2D_ANT1))<< 0,
//	//dstBaseAddr	
	.paraALG.alg11_cfar2.cfarCfg8= (GET_OFFSET(UDFDEF_ADDR_CFAR2_CACHE)) << 0,

	#endif

#if 1 /* alg12 ant1 fft3d pre */
	// ALG12: FFT3D_Pre ANT1
	.paraALG.alg12.srcAddr  = UDFDEF_ADDR_FFT2D_ANT1,
	.paraALG.alg12.intraCnt = UDFDEF_VEL_NUM,
	.paraALG.alg12.interCnt = 1,
	.paraALG.alg12.dstAddr  = UDFDEF_ADDR_FFT3D_PRE + NUM_BYTE32,
#endif

#if 1 /* alg20 ant2 fft3d pre */
	// ALG20: FFT3D_Pre ANT2
	.paraALG.alg20.srcAddr  = UDFDEF_ADDR_FFT2D_ANT2,
	.paraALG.alg20.intraCnt = UDFDEF_VEL_NUM,
	.paraALG.alg20.interCnt = 1,
	.paraALG.alg20.dstAddr  = UDFDEF_ADDR_FFT3D_PRE,
#endif

#if 1
	// ALG23: angle DFT
	// intraCnt,fix2pfLsfB,max_clr,p2_fft_mode,dma_dsize,rsfBit,sub_mode,mode
	.paraALG.alg23.p2Cfg0 = (UDFDEF_ANT_NUM - 1) << 20 |
							 P2_FIX2PF_LSFB_0BIT << 17 |
							 P2_MAX_CLR_EN << 16 |
							 P2_FFT_MODE_DIS << 14 |
							 P2_DMA_DSIZE_32BIT << 12 |
							 P2_RSF_DIV1 << 8 |
							 P2_SUBMODE_0 << 4 |
							 P2_MODE_MAC,
	// jumpCnt,interCnt
	.paraALG.alg23.p2Cfg1 = (NUM_ANGLE - 1) << 12 | (0) << 0,
	// ncoMode,nco_fcw
	.paraALG.alg23.p2Cfg2 = (0) << 24 | (0) << 0,
	// src0JumpInc,src0InterInc
	.paraALG.alg23.p2Cfg3 = (UDFDEF_ANT_NUM * NUM_BYTE32) << 16 | (0) << 0,
	// src0IntraInc,src0BaseAddr
	.paraALG.alg23.p2Cfg4 = (NUM_BYTE32) << 16 | (GET_OFFSET(UDFDEF_ADDR_ARRAY_CALIB_RUN)) << 0,
	// src1JumpInc,src1InterInc
	.paraALG.alg23.p2Cfg5 = (0) << 16 | (0) << 0,
	// src1IntraInc,src1BaseAddr
	.paraALG.alg23.p2Cfg6 = (NUM_BYTE32) << 16 | (GET_OFFSET(UDFDEF_ADDR_FFT3D_PRE)) << 0,
	// dstJumpInc,dstInterInc
	.paraALG.alg23.p2Cfg7 = (NUM_BYTE32) << 16 | (0) << 0,
	// dstIntraInc,dstBaseAddr
	.paraALG.alg23.p2Cfg8 = (0) << 16 | (GET_OFFSET(UDFDEF_ADDR_ANGLE_RSLT)) << 0,
#endif
	#if 1 /*alg25*/
		//intraCnt,fix2pfLsfB,max_clr,p2_fft_mode,dma_dsize,rsfBit,sub_mode,mode				
		.paraALG.alg25.p2Cfg0=(UDFDEF_ADCSAMP_NUM-1)<< 20 |
								P2_FIX2PF_LSFB_0BIT<<17 |
								P2_MAX_CLR_EN<<16       |
								P2_FFT_MODE_EN<<14      |
								P2_DMA_DSIZE_32BIT<<12  |
								P2_RSF_DIV1<<8          |
								P2_SUBMODE_0<<4         |
								P2_MODE_DMA,

		//jumpCnt,interCnt
		.paraALG.alg25.p2Cfg1=(1-1)<< 12 |(UDFDEF_CHIRP_NUM-1)<< 0,
		//ncoMode,nco_fcw
		.paraALG.alg25.p2Cfg2=(0)<< 24 |(0)<< 0,
		//src0JumpInc,src0InterInc
		.paraALG.alg25.p2Cfg3=(0)<<16 |(NUM_BYTE32)<< 0,
		//src0IntraInc,src0BaseAddr	
		.paraALG.alg25.p2Cfg4=(UDFDEF_CHIRP_NUM*NUM_BYTE32)<<16 |(GET_OFFSET(UDFDEF_ADDR_FFT1D_ANT1))<< 0,
		//src1JumpInc,src1InterInc	
		.paraALG.alg25.p2Cfg5=(0)<<16 |(0)<< 0,
		//src1IntraInc,src1BaseAddr  
		.paraALG.alg25.p2Cfg6=(0)<<16 |(0)<< 0,		
		//dstJumpInc,dstInterInc  
		.paraALG.alg25.p2Cfg7=(0)<<16 |(NUM_BYTE32)<< 0,
		//dstIntraInc,dstBaseAddr   			
		.paraALG.alg25.p2Cfg8=(UDFDEF_CHIRP_NUM*NUM_BYTE32)<<16 |(GET_OFFSET(UDFDEF_ADDR_FFT1D_ANT1))<<0,
		
		#if (RAMP_BANDWIDTH == 0)
		.paraALG.alg25.fftCfg0=(UDFDEF_ADCSAMP_NUM-1)<< 8 |(FFT_PT256)<< 4|(FFT_MODE_FORWARD)<<0,
		#else
		//inPt,fftPt,mode				
		.paraALG.alg25.fftCfg0=(UDFDEF_ADCSAMP_NUM-1)<< 8 |(FFT_PT64)<< 4|(FFT_MODE_FORWARD)<<0,
		#endif
		//useA,useB 
		.paraALG.alg25.fftCfg1=(0)<< 8 |(UDFDEF_RANGE_USE-1)<< 0,
		//winBaseAddr,winSize,winEn
		#ifdef RANGE_WIN_ENABLE
		.paraALG.alg25.fftCfg2=(uint32_t)(GET_OFFSET(UDFDEF_ADDR_WIN_RANGE))<<16|(FFT_WIN_SIZE_14BIT)<< 1 |(FFT_WIN_EN)<< 0,
		#else
		.paraALG.alg25.fftCfg2=(uint32_t)(GET_OFFSET(UDFDEF_ADDR_WIN_RANGE))<<16|(FFT_WIN_SIZE_14BIT)<< 1 |(FFT_WIN_DIS)<< 0,
		#endif
		.paraALG.alg25_dstInc = NUM_BYTE32,
	#endif
	
	#if 1 /*alg26 abs mean */
	/*alg26*/
	// intraCnt,fix2pfLsfB,max_clr,p2_fft_mode,dma_dsize,rsfBit,sub_mode,mode
	.paraALG.alg26.p2Cfg0 = (UDFDEF_RANGE_USE - 1) << 20 |
	P2_FIX2PF_LSFB_0BIT << 17 |
	P2_MAX_CLR_EN << 16 |
	P2_FFT_MODE_DIS << 14 |
	P2_DMA_DSIZE_32BIT << 12 |
	P2_RSF_DIV256 << 8 |
	P2_SUBMODE_1 << 4 |
	P2_MODE_ACC,  // covered by udf03 code
	// jumpCnt,interCnt
	.paraALG.alg26.p2Cfg1 = (1 - 1) << 12 | (1 - 1) << 0,
	// ncoMode,nco_fcw
	.paraALG.alg26.p2Cfg2 = (0) << 24 | (0) << 0,
	// src0JumpInc,src0InterInc
	.paraALG.alg26.p2Cfg3 = (0) << 16 | (0) << 0,
	// src0IntraInc,src0BaseAddr
	.paraALG.alg26.p2Cfg4 = (NUM_BYTE32) << 16 | (0) << 0,// covered by udf code
	// src1JumpInc,src1InterInc
	.paraALG.alg26.p2Cfg5 = (0) << 16 | (0) << 0,
	// src1IntraInc,src1BaseAddr
	.paraALG.alg26.p2Cfg6 = (0) << 16 | (0) << 0,
	// dstJumpInc,dstInterInc
	.paraALG.alg26.p2Cfg7 = (0) << 16 | (0) << 0,
	// dstIntraInc,dstBaseAddr
	.paraALG.alg26.p2Cfg8 = (0) << 16 | (0) << 0,  // covered by udf code
#endif
	// ALG24: Ԥ��

	// ALGEN
	//     .paraALG.algEn=ALG0_EN|ALG1_DIS|ALG2_DIS|ALG3_EN|ALG4_DIS|ALG5_EN|ALG6_DIS|ALG7_DIS|ALG8_DIS|ALG9_DIS|ALG10_EN|
	//										ALG11_DIS|ALG12_EN|ALG13_DIS|ALG14_DIS|ALG15_DIS|ALG16_EN|ALG17_DIS|ALG18_EN|ALG19_DIS|ALG20_EN|ALG21_DIS|ALG22_DIS|ALG23_EN|ALG24_DIS|ALG25_EN|ALG26_DIS,
	//     .paraALG.algEn=ALG0_EN|ALG1_EN|ALG2_EN|ALG3_EN|ALG4_DIS|ALG6_EN|ALG10_EN|ALG12_EN|ALG16_EN|ALG17_EN|ALG18_EN|ALG19_EN|ALG20_EN|ALG22_EN|ALG23_EN|ALG25_EN|ALG26_DIS,
	// ALG1_EN | ALG2_EN | ALG6_EN | ALG10_EN | ALG12_EN | ALG14_EN | ALG16_EN | ALG19_EN | ALG20_EN | ALG22_EN | ALG23_EN,
	// COPY1

	.paraALG.copyEn = 0,//COPY1_EN,
	.paraALG.copyFlashEn = 0,
	// fft1d mean mode
	.paraALG.MeanMode = FFT1D_MEAN_CUR,
	//		.paraALG.SRAM_MeanOld1Addr=0x20000c00,
	//		.paraALG.BBE_MeanOldAddr=BBE_ABUF0_BASE+31*1024,
	//		.paraALG.BBE_MeanCurAddr=BBE_ABUF0_BASE+31*1024,
	//		.paraALG.Old1MeanCnt=1024,
	//		.paraALG.Old2MeanCnt=0,

	.paraALG.crcLen = 1338, // 1338
	.paraALG.crcVal = UDP_ALG_CRC,

	/**************************************paramFunc*************************/
	.paraFunc.frameT0_msec = 3*3276-176,//3100,
	.paraFunc.frameT1_msec = 3*3276,//3276, //100=3.2ms   1ms=30.5cnt  3276
	.paraFunc.pro_func = 2,
	#if UART_BAUDRATE == 0
	.paraFunc.baudrate = 2000000,
	#elif ( UART_BAUDRATE == 1 )
	.paraFunc.baudrate = 115200,
	#else
	.paraFunc.baudrate = 9600,
	#endif
	.paraFunc.wdt_cnt = 160000, // 1=31.25us   32K clock,  64000=2s 160000=5s
	.paraFunc.uartOutputAddr = UDFDEF_ADDR_UART_OUTPUT,

	.paraFunc.uartDebugAddr = UDFDEF_ADDR_DEBUG_OUTPUT,
	
	#if defined(GPIO_OUTPUT_ENABLE)
	.paraFunc.gpio_pmode = 0x000000000 | (1<<GPIO_OUTPUT_PIN) |(1<<4),
	
	#if GPIO_OUTPUT_ACTIVE==0
	.paraFunc.gpio_pctrl_ue = 0x000021C0 & (~(1<<GPIO_OUTPUT_PIN)), // 默认下拉
	#else
	.paraFunc.gpio_pctrl_ue = 0x000021C0 | (1<<GPIO_OUTPUT_PIN),    // 默认上拉
	#endif
	
	#else
	.paraFunc.gpio_pmode = 0x000000000,
	.paraFunc.gpio_pctrl_ue = 0x000021C0, // 0.6 0.7 0.8 0.13 上拉
	#endif
	
	#if defined(LIGHT_DETECT)
	.paraFunc.gpio_pctrl_re = 0x0000FFF8,
	#else
	.paraFunc.gpio_pctrl_re = 0x0000FFFE,
	#endif
	.paraFunc.gpio_pmux0    = 0x11000000,	// usci1
	.paraFunc.gpio_pmux1    = 0x00666666,	// qspi

	.paraFunc.udf01_addr.srcAddr = UDF01_SRC_ADDR + UDF_OFFSET,
	.paraFunc.udf01_addr.dstAddr = UDF_DST_ADDR + UDF_OFFSET,
	.paraFunc.udf01_len = UDP_UDF_LEN(01),

	.paraFunc.udf02_addr.srcAddr = UDF02_SRC_ADDR + UDF_OFFSET,
	.paraFunc.udf02_addr.dstAddr = UDF_DST_ADDR + UDF_OFFSET,
	.paraFunc.udf02_len = UDP_UDF_LEN(02),

	.paraFunc.udf03_addr.srcAddr = UDF03_SRC_ADDR + UDF_OFFSET,
	.paraFunc.udf03_addr.dstAddr = UDF_DST_ADDR + UDF_OFFSET,
	.paraFunc.udf03_len = UDP_UDF_LEN(03),

	.paraFunc.udf04_addr.srcAddr = UDF04_SRC_ADDR + UDF_OFFSET,
	.paraFunc.udf04_addr.dstAddr = UDF_DST_ADDR + UDF_OFFSET,
	.paraFunc.udf04_len = UDP_UDF_LEN(04),

	.paraFunc.udf05_addr.srcAddr = UDF05_SRC_ADDR + UDF_OFFSET,
	.paraFunc.udf05_addr.dstAddr = UDF_DST_ADDR + UDF_OFFSET,
	.paraFunc.udf05_len = UDP_UDF_LEN(05),

	.paraFunc.udf06_addr.srcAddr = UDF06_SRC_ADDR + UDF_OFFSET,
	.paraFunc.udf06_addr.dstAddr = UDF_DST_ADDR + UDF_OFFSET,
	.paraFunc.udf06_len = UDP_UDF_LEN(06),

	.paraFunc.udf07_addr.srcAddr = UDF07_SRC_ADDR + UDF_OFFSET,
	.paraFunc.udf07_addr.dstAddr = UDF_DST_ADDR + UDF_OFFSET,
	.paraFunc.udf07_len = UDP_UDF_LEN(07),

	.paraFunc.udf08_addr.srcAddr = UDF08_SRC_ADDR + UDF_OFFSET,
	.paraFunc.udf08_addr.dstAddr = UDF_DST_ADDR + UDF_OFFSET,
	.paraFunc.udf08_len = UDP_UDF_LEN(08),

	.paraFunc.udf09_addr.srcAddr = UDF09_SRC_ADDR + UDF_OFFSET,
	.paraFunc.udf09_addr.dstAddr = UDF_DST_ADDR + UDF_OFFSET,
	.paraFunc.udf09_len = UDP_UDF_LEN(09),

	.paraFunc.udf10_addr.srcAddr = UDF10_SRC_ADDR + UDF_OFFSET,
	.paraFunc.udf10_addr.dstAddr = UDF_DST_ADDR + UDF_OFFSET,
	.paraFunc.udf10_len = UDP_UDF_LEN(10),

	.paraFunc.udf11_addr.srcAddr = UDF11_SRC_ADDR + UDF_OFFSET,
	.paraFunc.udf11_addr.dstAddr = UDF_DST_ADDR + UDF_OFFSET,
	.paraFunc.udf11_len = UDP_UDF_LEN(11),

	.paraFunc.udf12_addr.srcAddr = UDF12_SRC_ADDR + UDF_OFFSET,
	.paraFunc.udf12_addr.dstAddr = UDF_DST_ADDR + UDF_OFFSET,
	.paraFunc.udf12_len = UDP_UDF_LEN(12),

	.paraFunc.udf13_addr.srcAddr = UDF13_SRC_ADDR + UDF_OFFSET,
	.paraFunc.udf13_addr.dstAddr = UDF_DST_ADDR + UDF_OFFSET,
	.paraFunc.udf13_len = UDP_UDF_LEN(13),

	.paraFunc.udf14_addr.srcAddr = UDF14_SRC_ADDR + UDF_OFFSET,
	.paraFunc.udf14_addr.dstAddr = UDF_DST_ADDR + UDF_OFFSET,
	.paraFunc.udf14_len = UDP_UDF_LEN(14),

	.paraFunc.udf15_addr.srcAddr = UDF15_SRC_ADDR + UDF_OFFSET,
	.paraFunc.udf15_addr.dstAddr = UDF_DST_ADDR + UDF_OFFSET,
	.paraFunc.udf15_len = UDP_UDF_LEN(15),

	.paraFunc.udf16_addr.srcAddr = UDF16_SRC_ADDR + UDF_OFFSET,
	.paraFunc.udf16_addr.dstAddr = UDF_DST_ADDR + UDF_OFFSET,
	.paraFunc.udf16_len = UDP_UDF_LEN(16),
	//*******************************************************************************************************

	.paraFunc.udfEn = UDF_EN, //

	.paraFunc.uartDebugLen = 0, // UDFDEF_ADCSAMP_NUM*UDFDEF_CHIRP_NUM*UDFDEF_ANT_NUM,

	.paraFunc.AtCmdDelay = 1000,	   // ms

	.paraFunc.rtcCailbFrameCnt = 100, // 100 frame calb 1
	.paraFunc.rtcCailbClkCnt = 8,	   // 8 16 32 64 128
	.paraFunc.rangeIdxTh = UDFDEF_RANGE_USE,
	.paraFunc.numTLVs = 1,
	.paraFunc.funcEn = FUNC_PROTOCOL_DIS | FUNC_DEBUG_DIS | FUNC_RTC_CALIB_DIS | FUNC_CRC_PATCH_EN | FUNC_SPI1_00_EN,
	.paraFunc.uartDebugMode = 0,				// 0 uart 1:spi

	.paraFunc.qspiMode = FLASH_INTERFACE,			// 0:single-line  1:4-line
	.paraFunc.spi1_baudDiv = 0,
	
	.paraFunc.ab_area_offset=OTA_SIZE_MAX,
	.paraFunc.rsv_crc=UDP_RSV_CRC,
	.paraFunc.ab_area_flag=1,
	
	.paraFunc.crcLen = 228, // 228
	.paraFunc.crcVal = UDP_FUNC_CRC,
	
	#if 0 && (TEST_MODE == 5)
	.paraRSV.frame_interval = 1000,
	#elif (TEST_MODE == 12)
	.paraRSV.frame_interval = 1000,
	#else
	.paraRSV.frame_interval = FRAME_INTERVAL_MS*0.94,//FRAME_INTERVAL_MS*0.94,
	#endif
	
	.paraRSV.gpio_delay_sec = 2,


	#if 0
	// pdEn,cfarMode,wkMode
	.paraRSV.vel_cfar_cfg.cfarCfg0 = (CFAR_PEAKDET_DIS) << 8 | (CFAR_CFARMODE_SO) << 4 | (CFAR_WKMODE_CFAR) << 0,
	// interCnt,intraCnt
	.paraRSV.vel_cfar_cfg.cfarCfg1 = (UDFDEF_RANGE_USE) << 12 | (UDFDEF_VEL_NUM) << 0,
	// wrapDirA,wrapDirB,thresDiv,divFac,mulFac,searchSize,guardSize
	.paraRSV.vel_cfar_cfg.cfarCfg2 = (0) << 25 | (0) << 24 | (CFAR_THRESDIV4) << 20 | (CFAR_DIVFAC1) << 16 | (UDFDEF_PRESENCE_CFAR_VTH) << 8 | (UDFDEF_PRESENCE_CFAR_VS) << 4 | (UDFDEF_PRESENCE_CFAR_VG) << 0,
	// cutThres
	.paraRSV.vel_cfar_cfg.cfarCfg3 = (0) << 0,
	// targetLim
	.paraRSV.vel_cfar_cfg.cfarCfg4 = (CFAR_MAX_NUM - 1) << 0,
	// srcInterInc
	.paraRSV.vel_cfar_cfg.cfarCfg5 = (UDFDEF_CHIRP_NUM*NUM_BYTE32) << 0,
	// srcIntraInc,srcBaseAddr
	.paraRSV.vel_cfar_cfg.cfarCfg6 = (NUM_BYTE32) << 16 | (GET_OFFSET(UDFDEF_ADDR_FFT2D_ANT1)) << 0, // ant1
	// wrapAddrA,wrapAddrB
	.paraRSV.vel_cfar_cfg.cfarCfg7 = (uint32_t)(GET_OFFSET(UDFDEF_ADDR_FFT2D_ANT1) + (UDFDEF_VEL_NUM - UDFDEF_PRESENCE_CFAR_VS - UDFDEF_PRESENCE_CFAR_VG)*NUM_BYTE32) << 16 | (GET_OFFSET(UDFDEF_ADDR_FFT2D_ANT1)) << 0,
					
	// dstBaseAddr
	.paraRSV.vel_cfar_cfg.cfarCfg8 = (GET_OFFSET(UDFDEF_ADDR_CFAR1_CACHE)) << 0,
	#endif
	
	#if 0
	//pdEn,cfarMode,wkMode	
	.paraRSV.range_cfar_cfg.cfarCfg0= (CFAR_PEAKDET_EN)<< 8 |(CFAR_CFARMODE_SO  )<< 4|(CFAR_WKMODE_CFAR)<< 0,
	//interCnt,intraCnt	
	.paraRSV.range_cfar_cfg.cfarCfg1= (UDFDEF_VEL_NUM)<< 12 |(UDFDEF_RANGE_USE)<< 0,
	//wrapDirA,wrapDirB,thresDiv,divFac,mulFac,searchSize,guardSize
	.paraRSV.range_cfar_cfg.cfarCfg2= (0)  << 25|(0)  << 24|(CFAR_THRESDIV4)  << 20|(CFAR_DIVFAC1) << 16|(UDFDEF_PRESENCE_CFAR_RTH) << 8| (UDFDEF_PRESENCE_CFAR_RS)<< 4|(UDFDEF_PRESENCE_CFAR_RG) << 0,//default:2
	//cutThres	
	.paraRSV.range_cfar_cfg.cfarCfg3= (0) << 0,
	//targetLim
	.paraRSV.range_cfar_cfg.cfarCfg4= (CFAR_MAX_NUM-1)<< 0,
	 //srcInterInc  
	.paraRSV.range_cfar_cfg.cfarCfg5= (NUM_BYTE32)<< 0,
	 //srcIntraInc,srcBaseAddr 
	.paraRSV.range_cfar_cfg.cfarCfg6= (NUM_BYTE32*UDFDEF_CHIRP_NUM)<< 16 |(GET_OFFSET(UDFDEF_ADDR_FFT2D_ANT1))<< 0,
	//wrapAddrA,wrapAddrB	
	.paraRSV.range_cfar_cfg.cfarCfg7= (uint32_t )(GET_OFFSET(UDFDEF_ADDR_FFT2D_ANT1)+(UDFDEF_RANGE_USE - UDFDEF_PRESENCE_CFAR_RS - UDFDEF_PRESENCE_CFAR_RG)*NUM_BYTE32*UDFDEF_CHIRP_NUM)<< 16|
	 (GET_OFFSET(UDFDEF_ADDR_FFT2D_ANT1))<< 0,

	//dstBaseAddr	
	.paraRSV.range_cfar_cfg.cfarCfg8= (GET_OFFSET(UDFDEF_ADDR_CFAR2_CACHE)) << 0,		

	#endif

	.paraRSV.divFac = {
		4096, 2048, 1365, 1024, 819, 683, 585, 512, 455, 410, 372, 341, 315, 293, 273, 256, 241, 228, 216, 205, 195, 186, 178, 171
		//, 124, 120, 117, 114, 111, 108, 105, 102, 100, 98, 95, 93, 91, 89, 87, 85, 84, 82, 80, 79, 77, 76, 74, 73, 72, 71, 69, 68, 67, 66, 65, 64
	},

	.paraRSV.startup_flag = 1,
//	.paraRSV.version = {FW_VERSION},
	.paraRSV.bodyInFlag = 0,
	.paraRSV.bodyInCnt  = 0,
	.paraRSV.judgeBuff  = {0},
	.paraRSV.frameDiff  = 0,
	.paraRSV.Outside_trigger_range = 0,
	.paraDataPrep.switch_flag = 0,
};

